Bulldozer cache design

Each core has a 64KB Track Dozer  level data cache, 64KB instruction cache, 32-entry fully associative data cache page table (DATA TLB), complete out of order load / save unit, which can in each clock cycle Loading 128 within two or load a 128-bit instruction. Each module is equipped with 2MB 16 way associative secondary cache, 124-entry two page table cache can handle instructions and data requests. Bulldozer supports up to 23 secondary cache misses, memory system for maintaining consistency. Finally, all modules with a bulldozer processor core shared 8MB 64 way associative cache levels. Bulldozer significantly improves power management technology, support CC6 power state at the core level, at the module level can be supported by the secondary cache CC6 power gating (Power Gating). With power gating, idle core can be almost completely off, giving the other core leaving more space to accelerate. Full hydraulic crawler bulldozer has three modes of operation: acceleration frequency of the original preset reference frequency, acceleration frequencies all the core open, half of the core open. All core acceleration: If the excess thermal design power (TDP) space allows, bulldozers can be accelerated for all the core